Helen Ramya Bharathi. R

Passionate and dedicated professional with experience as an Assistant Professor, have taken a career break to raise children and support family needs, now seeking to re-enter the workforce with fresh mindset and skills.

• Analytical Modeling and Simulation of Dual Material Double Gate All Around Tunnel Field Effect Transistor (DMDGAA TFET), 2017 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS), III, 388-394, 978-1-5090-3293-8, IEEE Xplore.
• The Future Device–TFET: Survey, International Journal of Emerging Technologies in Engineering Research (IJETER), 5, 4, 304-309, 2454-6410.
• Improved Memory Reliability against Multiple Cell Upsets: Survey, International Journal of Emerging Technologies in Engineering Research (IJETER), 5, 4, 300-303, 2454-6410.

• Analytical Modeling and Simulation of Dual Material Double Gate All Around Tunnel Field Effect Transistor (DMDGAA TFET), Device Modeling in VLSI.
• Low Power Coarse Grained Reconfigurable Adder for Cryptography Algorithm, VLSI.
• Analytical Modeling and Simulation of Triple Material Double Gate All Around Carbon NanoTube Tunnel Field Effect Transistor (TMDGAA CNT TFET), Device Modeling in VLSI.